My first article in this series explained the history behind Apple’s M-series chips, and how they use ARM’s big.LITTLE architecture in heterogeneous multi-processing (HMP) with two types of CPU core. If you haven’t yet watched my presentation for MacSysAdmin 2022, now is a good time to view it, so you’re better prepared for the detail that follows.

P cores

The P cores in Apple’s M1 and M2 series chips have six integer units and four floating-point/NEON units. While they use plenty of techniques such as out-of-order execution to optimise performance, as explored and documented by Dougall Johnson, Maynard Handley and others, those are well beyond the influence or control of mere users. Here I’ll concentrate on features of more direct relevance to how macOS uses those cores.

P cores idle at a frequency of 600 MHz, and have a maximum frequency of either 3204 MHz in the original M1 chip, or 3228 MHz in M1 Pro/Max/Ultra versions. In practice, under the management of macOS, P cores are normally run at steady frequencies of 600 or 3036 MHz and higher, but can run at intermediate frequencies when loads are changing. Once load is removed, they return almost immediately to idle frequency.

Frequencies in both types of core are set by cluster, and don’t differ within any given cluster. So when the first P cluster is loaded with one or more threads, macOS raises the frequency of all its four cores until those threads are complete, when they’ll fall back very quickly to idle.

Power measurements match frequency, with each P core typically drawing up to a maximum around 2.5 W for a cluster total of about 10 W, but using very little when idle.

E cores

In terms of functional units, each E core is roughly h