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Axelera, the European chip startup working on an edge AI accelerator, has demonstrated a working chip at the Embedded Vision Summit. The company also announced it raised an oversubscribed $50-million series A in an increasingly challenging fundraising climate for chip startups. New investors include a consortium of CDP Venture Capital, Verve Ventures and Fractionelera, which was formed to invest in Axelera.
The company will use the capital to scale up its Metis accelerator production, expand its sales force and grow its fledgling operation in the United States, Axelera CEO Fabrizio Del Maffeo told EE Times. The funding will also go towards designing a next-gen version of the accelerator.
Core technologies
Axelera CTO Evangelos Eleftheriou said the company’s Metis chip relies on two key technologies: a digital in-memory compute-based matrix-vector multiply (MVM) accelerator with a RISC-V core to control dataflow. The quad-core design can achieve 214 TOPS peak performance with the peak efficiency at 14.7 TOPS/W.
âThe whole design is hand-crafted down to the last transistor,â Eleftheriou said. âThe reason is to minimize area and energy consumption.â
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Energy efficiency does not depend on high utilization, Eleftheriou added, since blocks can be disabled using a flag. At the core level, for 100% utilization the efficiency is 14.1 TOPS/W, but drop the utilization very low to 6.25%, and Metis can still achieve 11.4 TOPS/W.
Axeleraâs 52.5 TOPS MVM accelerator features densely interleaved weight storage and compute units. The design uses pipelining to maintain throughput. INT8 is used for weights, which accumulate in INT32. FP32 is used for activations. This is done to preserve accuracy: running an INT8-quantized ResNet-50 model lost only 0.1 percentage points versus the unquantized FP32 model, without retraining.
âWe did lots of simulations to understand what optimizations we needed to do,â Eleftheriou said. âWe know that, in general, neural networks are forgiving when it comes to weight precision, but they are not forgiving when it comes to activation precision.â
There is a small RISC-V CPU in each AI core to manage dataflow over memory mapped I/O. This is a scalar float
